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functional block diagram v c ?in +in v g v 1?g ?i g ?i 1?g gain core g 1?g ssm2018t features 117 db dynamic range 0.006% typical thd+n (@ 1 khz, unity gain) 140 db gain range no external trimming required differential inputs complementary gain outputs buffered control port i? converter on-chip low external parts count low cost t rimless voltage controlled amplifiers ssm2018t * information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. rev. b a new e grade 0.01% thd+n max general description the ssm2018t represents continuing evolution of the frey operational voltage controlled element (ovce) topology that permits flexibility in the design of high performance volume control systems. the ssm2018t is laser trimmed for gain core symmetry and offset. as a result, the ssm2018t is the first professional audio quality vca to offer trimless operation. due to careful gain core layout, the ssm2018t combines the low noise of class ab topologies with the low distortion of class a circuits to offer an unprecedented level of sonic trans- pare ncy. additional features include differential inputs, a 140 db (?00 db to +40 db) gain range and a high impedance control port. the ssm2018t provides an internal current-to-voltage converter. thus no external active components are required. this device is offered in 16-lead plastic dip and soic packages and guaranteed for operation over the extended industrial tempera- ture range of 40 c to +85 c. * protected by u.s. patent nos. 4,471,320 and 4,560,947. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?nalog devices, inc., 2002
ssm2018t?pecifications electrical specifications parameter conditions min typ max max (e grade) unit audio performance noise v in = gnd, 20 khz bandwidth ?5 ?3 dbu headroom clip point = 1% thd + n 22 dbu total harmonic distortion plus noise 2nd and 3rd harmonics only (25 cto85 c) a v = 0 db, v in = +10 dbu 0.006 0.020 0.01 % a v = +20 db, v in = ?0 dbu 0.013 0.03 0.02 % a v = ?0 db, v in = +10 dbu 0.013 0.03 0.02 % input amplifier bias current v cm = 0 v 0.25 1 m a offset voltage v cm = 0 v 1 15 mv offset current v cm = 0 v 10 100 na input impedance 4 m w common-mode range 13 v gain bandwidth vca configuration 0.7 mhz vcp configuration 14 mhz slew rate 5v/ m s output amplifier offset voltage v in = 0 v, v c = 4 v 1.0 15 mv output voltage swing i out = 1.5 ma positive 10 13 v negative ?0 ?4 v minimum load resistance for full output swing 9 k w control port bias current 0.36 1 m a input impedance 1 m w gain constant device powered in socket > 60 sec ?0 mv/db gain constant temperature coefficient ?500 ppm/ c control feedthrough 0 db to 40 db gain range 1 4 3mv maximum gain v c = ?.3 v 40 mv maximum attenuation v c = 4 v 100 db power supplies supply voltage range 5 18 v supply current 11 15 ma power supply rejection ratio 80 db specifications subject to change without notice. rev. b ? (v s = 15 v, a v = 0 db, r l = 100 k , f = 1 khz, 0 dbu = 0.775 v rms, simple vca application circuit with 18 k resistors, ? in floating, and class ab gain core bias (r b = 150 k ), 40 c < t a < +85 c, unless otherwise noted. typical specifications apply at t a = 25 c.)
rev. b ? ssm2018t absolute maximum ratings 1 supply voltage dual supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v s operating temperature range . . . . . . . . . . . . 40 c to +85 c storage temperature . . . . . . . . . . . . . . . . . . . ?5 c to +150 c junction temperature (t j ) . . . . . . . . . . . . . . . . . . . . . . 150 c lead temperature (soldering, 60 sec) . . . . . . . . . . . . . 300 c thermal characteristics thermal resistance 2 16-lead plastic dip ja . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 c/w jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 c/w 16-lead soic ja . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 c/w jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 c/w transistor count number of transistors ssm2018t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 esd ratings 883 (human body) model . . . . . . . . . . . . . . . . . . . . . . . 500 v eiaj model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 v notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 ja is specified for worst-case conditions, i.e.; ja is specified for device in socket for p-dip and device soldered in circuit board for soic package. pin configuration 16-lead plastic dip and sol +i 1?g v+ bal comp 1 +in ?in mode v c v? ?i 1?g ?i g v g gnd comp 2 comp 3 ssm2018t v 1?g top view (not to scale) ordering guide model temperature range package option 1 ssm2018tp 40 c to +85 c n-16 ssm2018ts 2 ?0 c to +85 c r-16 1 n = plastic dip; r = sol. 2 not for new designs; obsolete april 2002. v+ 1 f 150k 18k v+ 18k v in+ 1 f 18k v in? 47pf 1 f 50pf 1k v control 3k v out v? ssm2018t ssm2018t typical application circuit caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. a lth o ugh the ssm2018t features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. therefo re, proper esd precau- tions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device
? ssm2018t?ypical performance characteristics rev. b frequency ? hz 0.1 0.001 20 10k thd + n ? % 0.010 1k 100 20k t a = +25 c v s = 15v r f = 18k av = +20db av = ?20db av = 0db a tpc 1. ssm2018t thd + n frequency (80 khz low-pass filter, for a v = 0 db, v in = 3 v rms; for a v = +20 db, v in = 0.3 v rms; for a v = ?0 db, v in = 3 v rms) tpc 2. ssm2018t distortion distribution amplitude ? v rms 0.1 0.001 0.1 10 thd + n ? % 0.010 120 t a = +25 c r f = 18k v s = 15v a 0.1 tpc 3. ssm2018t thd + n vs. amplitude (gain = 0 db, f in = 1 khz, 80 khz low-pass filter) amplitude ? v rms 0.1 0.001 10m 1 thd + n ? % 0.010 0.1 2 t a = +25 c v s = 15v r f = 18k a tpc 4. ssm2018t thd + n vs. amplitude (gain = +20 db, f in =1 khz, 80 khz low-pass filter) 1.0 0.01 0.001 ?60 ?40 20 ?20 0.1 040 t a = +25 c v s = 15v r f = 18k gain ? db thd + n ? % tpc 5. ssm2018t thd + n vs. gain (f in = 1 khz; for ?0 db a v ?0 db, v in = 10 v rms; for 0 db a v +20 db, v in = 1 v rms) thd + n ? % 0.1 0.001 12 0.01 t a = +25 c r f = 18k 5 6 9 15 18 supply voltage ? volts tpc 6. ssm2018t thd + n vs. supply voltage (a v = 0 db, v in = 1 v rms, f in = 1 khz, 80 khz low-pass filter)
rev. b ? ssm2018t 500 300 0 100 100k 10k 1k 10 200 100 400 frequency ? hz noise density ? nv/ hz t a = +25 c v s = 15v tpc 7. ssm2018t noise density vs. frequency (unity gain, referred to input) 0 15 5 5 10 20 18 15 10 supply voltage ? volts output voltage swing ? v peak r l = r l = 10k r f = t a = +25 c tpc 8. ssm2018t maximum output swing vs. supply voltage (thd = 1% max) frequency ? hz maximum output swing ? v peak r l = 9 0 1k 10k 100k 3 6 12 15 r f = t a = +25 c v s = 15v r l = 10k tpc 9. ssm2018t maximum output swing vs. frequency (thd = 1 % max) load resistance ? maximum output swing ? v peak 15 12 0 100 1k 100k 10k 9 6 3 r f = 18k t a = +25 c v s = 15v tpc 10. ssm2018t maximum output swing vs. load resistance (thd = 1 % max) 100 0 40 30 10 ?60 20 ?80 60 40 50 70 80 90 20 0 ?20 ?40 t a = +25 c v s = 15v gain ? db output offset ? mv tpc 11. ssm2018t typical output offset vs. gain +10 0 ?15 1k 1m 100k 10k 100 ?5 ?10 +5 frequency ? hz t a = +25 c v s = 15v gain ? db 0 ?135 ?45 ?90 phase ? degrees gain phase tpc 12. ssm2018t gain/phase vs. frequency
rev. b ? ssm2018t 60 40 ?80 100 1k 10m 1m 100k 10k 20 0 ?20 ?40 ?60 frequency ? hz t a = +25 c v s = 15v gain ? db tpc 13. ssm2018t gain vs. frequency 0.06 0 100 0.03 0.01 ?20 0.02 ?40 0.05 0.04 80 40 20 060 temperature ? c distortion ? % t a = +25 c v s = 15v v in = 10dbu a v = ?20db and v in = ?10dbu a v = 20db v in = 10dbu a v = 0db tpc14. ssm2018t distortion vs. temperature ?60 ?110 40 ?80 ?100 ?40 ?90 ?60 ?70 20 0 ?20 gain ? db output noise ? dbu t a = +25 c v s = 15v tpc 15. ssm2018t output noise vs. gain (v in = gnd, 20 khz bandwidth) tpc 16. ssm2018t control feedthrough distribution 0 ?20 ?100 100 1k 100k 10k ?40 ?60 ?80 frequency ? hz v s = 15v t a = +25 c v c = 100mv rms control feedthrough ? db figure 17. ssm2018t control feedthrough vs. frequency 3 ?3 100 0 ?2 ?20 ?1 ?40 2 1 80 40 20 0 60 temperature ? c control feedthrough ? mv v s = 15v 0v v c 1.2v freq = 0hz tpc 18. ssm2018t control feedthrough vs. temperature
rev. b ? ssm2018t ?20 ?40 ?40 100 ?25 ?35 ?20 ?30 60 80 40 20 0 temperature ? c gain constant ? mv/db v s = 15v tpc 19. ssm2018t gain constant vs. temperature ?28 ?33 60 ?30 ?32 ?60 ?31 ?80 ?29 40 20 0 ?20 ?40 gain ? db gain constant ? mv/db t a = +25 c v s = 15v tpc 20. ssm2018t gain constant linearity vs. gain 0.1 0.0 ?0.4 100 1k 100k 10k ?0.1 ?0.2 ?0.3 frequency ? hz gain ? db t a = +25 c v s = 15v a v = 0db v in = 100v rms tpc 21. ssm2018t gain flatness vs. frequency 0 ?40 ?100 100 100k 10k 1k 10 ?60 ?80 ?20 frequency ? hz cmrr ? db v s = 15v t a = +25 c tpc 22. ssm2018t cmrr vs. frequency t a = +25 c 15.0 0 15 7.5 2.5 5 5.0 0 12.5 10.0 10 supply voltage ? volts slew rate ? v/ s + slew rate ? slew rate tpc 23. ssm2018t slew rate vs. supply voltage 0 ?40 ?100 100 100k 10k 1k 10 ?60 ?80 ?20 frequency ? hz + psrr ? psrr psrr ? db v s = 15v t a = +25 c tpc 24. ssm2018t psrr vs. frequency
rev. b ? ssm2018t normal and actually disables that output amplifier ensuring that it will not oscillate and cause interference problems. shorting the output to the negative supply does not cause the supply current to increase. this amplifier is only used in the ?vce application explained later. the control port follows a ?0 mv/db control law. the applica- tion circuit shows a 3 k w and 1 k w resistor divider from a control voltage. the choice of these resistors is arbitrary and could be any values to properly scale the control voltage. in fact, these resistors can be omitted if the control voltage has been properly scaled. the 1 m f capacitor is in place to provide some filtering of the control signal. although the control feedthrough is trimmed at the factory, the feedthrough increases with frequency (tpc 16). thus, high frequency noise can feed through and add to the noise of the vca. filtering the control signal helps minimize this noise source. theory of operation of the ssm2018t the ssm2018t has the same internal circuitry as the original ssm2018. the detailed diagram in figure 2 shows the main components of the vca. the essence of the ssm2018t is the gain core, which comprises two differential pairs (q1?4). when the control voltage, v c , is adjusted, current through the gain core is steered to one side or the other of the two differential pairs. the tail current for these differential pairs is set by the mode bias of the vca (class a or ab), which is labeled as i m in the diagram. i m is then modulated by a current proportional to the input voltage, labeled i s . for a positive input voltage, more current is steered (by the ?plitter? to the left differential pair; the opposite is true for a negative input. to understand how the gain control works, a simple example is best. take the case of a positive control voltage on pin 11. n otice that the bases of q2 and q3 are connected to ground via a 200 w resistor. a positive control voltage produces a positive voltage on the bases of q1 and q4. concentrating on the left-most differential pair, this raises the base voltage of q1 above that of q2. thus, more of the tail current is steered through q1 than through q2. the current from the collector of q2 flows through the external 18 k w feedback resistor around amplifier a3. when this current is reduced, the output voltage is also reduced. thus, a positive control voltage results in an attenuation of the input signal, which explains why the gain constant is negative. the collector currents of q2 and q3 produce the output voltage. the output of q3 is mirrored by amplifier a1 to add to the overall output voltage. on the other hand, the collector currents of q1 and q4 are used for feedback to the differential inputs. because pins 6 and 4 are shorted together, any input voltage produces an input current which flows into pin 4. the same is true for the inverting input, which is connected to pin 1. the overall feedback ensures that the current flowing through the input resistors is balanced by the collector currents in q1 and q4. compensating the ssm2018t the ssm108 has a network that uses an adaptive compensation scheme that adjusts the optimum compensation level for a given gain. the control voltage not only adjusts the gain core steering, it also adjusts the compensation. the ssm2018t has three compensation pins: comp1, comp2, and comp3. comp3 is norm ally left open. grounding this pin actually defeats the adap- tive co mpensation circuitry, giving the vca a fixed compensation point. the only time this is desirable is when the vca has fixed feedback, such as the voltage controlled panner (vcp) circuit applications th e ssm2018t is a trimless voltage c ontrolled amplifier (vca) for volume control in audio systems. the ssm2018t is identi- cal to the original ssm2018 in functionality and pinout; how- ever, it is the first professional quality audio vca in the marketplace that does not require an external trimming potenti- ometer to minimize distortion. instead, the ssm2018t is laser trimmed before it is packaged to ensure the specified thd and control feedthrough performance. this has a significant savings in not only the cost of external trimming potentiometers, but also the manufacturing cost of performing the trimming during production. basic vca configuration the primary application circuit for the ssm2018t is the basic vca configuration, which is shown in figure 1. this configura- tion uses differential current feedback to realize the vca. a complete description of the internal circuitry of the vca, and this configuration, is given in the theory of operation section below. the ssm2018t is trimmed at the factory for operation in the basic vca configuration with class ab biasing . thus, for optimal distortion and control feedthrough performance, the same con- figuration and biasing should be used. all of the graphs for the ssm2018t in the data sheet have been measured using the circuit of figure 1. v+ 1 f r b 150k 18k v+ 18k v in+ 1 f 18k v in? 47pf 1 f 50pf 1k v control 3k v out v? ssm2018t figure 1. basic vca application circuit in the simple vca configuration, the ssm2018t inputs are at a virtual ground. thus, 18 k w resistors are required to convert the input voltages to input currents. the schematic also shows ac coupling capacitors. these are inserted to minimize dc offsets generated by bias current through the resistors. without the capacitors, the dc offset due to the input bias current is typically 5 mv. the input stage has the flexibility to run either inverting, noninverting, or balanced. the most common configuration is to run it in the noninverting single-ended mode. if either input is unused, the associated 18 k w resistor and coupling capacitor should be removed to prevent any additional noise. the common-mode rejection in balanced mode is typically 55 db up to 1 khz, decreasing at higher frequencies as shown in tpc 21. to ensure good cmrr in the balanced configuration, the input resistors must be balanced. for example, a 1% mis- match results in a cmrr of 40 db. to achieve 55 db, these resistors should have an absolute tolerance match of 0.1%. the output of the basic vca is taken from pin 14, which is the output of an internal amplifier. notice that the second voltage output (pin 16) is connected to the negative supply. this is
rev. b ? ssm2018t a4 q3 q4 q1 q2 200 1?g g g 1?g 200 1.8k gain core comp 1 compensation network v ref im splitter a1 a3 v g +i 1-g bal ?i 1-g v 1-g v c gnd mode ?i g comp 3 comp 2 v+ v? +in ?in a2 a4 im + ( ) is 2 im ? ( ) is 2 figure 2. ssm2018t detailed functional diagram shown later in the data sheet. thus, for the basic vca circuit or the ovce circuit, comp3 should be left open. a compensation capacitor does need to be added between comp1 and comp2. because the vca operates over such a wide gain range, the compensation should ideally be optimized for each gain. when the vca is in high attenuation, there is very high ?oop gain,?and the part needs to have high compen- sation. on the other hand, at high gain, the same compensation capacitor would overcompensate the part and roll off the high frequency performance. thus, the ssm2018t employs a patented adaptive compensation circuit. the compensation capacitor is ?iller?connected between the base and collector of an inter- nal transistor. by changing the gain of this transistor via the control voltage, the compensation is changed. increasing the compensation capacitor causes the frequency response and slew rate to decrease, which tends to cause high frequency distortion to increase. for the basic vca circuit, 47 pf was chosen as the optimal value. the ovce circuit described later uses a 220 pf capacitor. the reason for the increase is to compensate for the extra phase shift from the additional output amplifier used in the ovce configuration. the compensation capacitor can be adjusted over a practical range from 47 pf to 220 pf if desired. below 47 pf, the parts may oscillate; above 220 pf the frequency response is significantly degraded. control section as noted above, the control voltage on pin 11 steers the current through the gain core transistors to set the gain. the unity gain (0 db) condition occurs at v c = 0. attenuation occurs in the vca for positive voltages (0 v to 3 v, typ), and gain occurs for negative voltage (0 v to ?.3 v, typ). from ?.3 v to +3.0 v, 140 db of gain range is obtainable. the output gain formula is as follows: v out = v in e ( av c ) (1) the exponential term arises from the standard ebers-moll equation describing the relationship of a transistor? collector current as a function of the base-emitter voltage: i c = i s e ( v be / v t ) (2) the factor a ?is a function not only of v t but also the scaling due to the resistor divider of the 200 w a nd 1.8 k w resistors shown in figure 2. the resulting expression for a ?is as follows: a = 1/(10 v t ), which is approximately equal to 4 at room temperature. substituting a = 4 in the above equation results in a ?8.8 mv/db control law at room temperature. the ?8.8 mv/db number is slightly different from the data sheet specification of ?0 mv/db. the difference arises from the temperature dependency of the control law. the term v t is known as the thermal voltage, and it has a direct dependency on temperature: v t = kt/q (k = boltzmann? constant = 1.38e?3, q = electron charge = 1.6e?9, and t = absolute temperature in kelvin). this temperature dependency leads to the ?500 ppm/ c drift of the control law. it also means that the control law changes as the part warms up. thus, our specifica- tion for the control law states that the part has been powered up for 60 seconds. when the part is initially turned on, the temperature of the die is still at the ambient temperature (25 c for example), but the power dissipation causes the die to warm up. with 15 v supplies and a supply current of 11 ma, 330 mw is dissipated. this number is multiplied by q ja to determine the rise in the die? temperature. in this case, the die increases from 25 c to approxi- mately 50 c. a 25 c temperature change causes a 8.25% increase in the gain constant, resulting in a gain constant of 30 mv/db. the graph in figure 17 shows how the gain constant varies over the full temperature range.
rev. b ?0 ssm2018t proper operating mode for the ssm2018t the ssm2018t has the flexibility of operating in either class a or class ab. this is accomplished by adjusting the amount of current flowing in the gain core (i m in figure 2). the traditional trade-off between the two classes is that class a tends to have lower thd but higher noise than class ab. however, by using well matched gain core transistors, distortion compensation circuitry and laser trimming, the ssm2018t has excellent thd performance in class ab. thus, it offers the best of both worlds in having the low noise of class ab with low thd. because the ssm2018t operates optimally in class ab, the distortion trim is performed for this class. to guarantee conform- ance to the data sheet thd specifications, the ssm2018t must be operated in class ab . this does not mean that it can not be oper- ated in class a, but the optimal thd trim point is different for the two classes. using class a operation results to 0.05% with- out trim. an external potentiometer could be added to change the trim back to its optimal point as shown in the ovce appli- cation circuit, but this adds the expense and time in adjusting a potentiometer. the class of operation is set by selecting the proper value for r b shown in figure 1. r b determines the current flowing into the mo de input (pin 12). for class ab operation with 15 v supplies, r b should be 150 k w . this results in a current of 95 m a. for other supply voltages, adjust the value of r b such that current remains at 95 m a. this current follows the formula: i mode = ( v cc ?.7 v ) r b (3) the factor of 0.7 v arises from the fact that the dc bias on pin 12 is a diode drop above ground. output drive t he ssm2018t is buffered by an internal op amp to provide a low impedance output. this output is capable of driving to within 1.2 v of either rail at 1% distortion for a 100 k w load. note: this 100 k w load is in parallel with the feedback resistor of 18 k w , so the effective load is 15.3 k w . for better than 0.01% distortion, the output should remain about 3.5 v away from either rail as shown in tpc 2. as the graph of output swing versus load resis- tance shows (tpc 9), to maintain less than 1% distortion the output current should be limited to approximately 1.3 ma. if higher current drive is required, the output should be buffered with a high quality op amp such as the op176 or ad797. the internal amplifiers are compensated for unity gain stability and are capable of driving a capacitive load up to 4700 pf. larger capacitive loads should be isolated from the output of the ssm2018t by the use of a 50 w series resistor. 18k 50pf v+ v out 47pf nc 1 f 1k 3k v? v+ 1 f 18k 1 f 18k r b : 150k for class ab nc = no connect r b v control v in+ v in? ssm2018t 470k 500k 100k 10m offset trim v+ v? symmetry trim remove for ssm2018t figure 3. upgrading ssm2018 sockets upgrading ssm2018 sockets the ssm2018t easily replaces the ssm2018 in the basic vca configuration. the parts are pin for pin compatible allowing direct replacement. at the same time, the trimming potentiom- eters for symmetry and offset should be removed, as shown in figure 3. upgrading immediately to the ssm2018t saves the expense of the potentiometers and the time in production of trimming for minimum distortion and control feedthrough. if the ssm2018 is used in the ovce or vcp configuration, the ssm2018t can still directly replace it; however, the potentiom- eters cannot necessarily be removed, as explained in the ovce and vcp sections. temperature compensation of the gain constant as explained above, the gain constant has a ?500 ppm/ c temperature drift due to the inherent nature of the control port. over the full temperature range of ?0 c to +85 c, the drift causes the gain to change by 7 db if the part is in a gain of 20 db. if the application requires the gain constant to be the same over a wide temperature range, external temperature com- pensation should be employed. the simplest form of compensa- tion is a temperature compensating resistor (tcr) such as the pt146 from precision resistor co. these elements are different than a standard thermistor in that they are linear over tempera- ture to better match the linear drift of the gain constant. *pt146 available from precision resistor co. 10601 75 th st. north largo, fl 34647 (813) 541-5771 +15v ?15v 1k * 2k op27 pin 11 ssm2018t control voltage figure 4. two tcrs compensate for temperature drift of gain constant
rev. b ?1 ssm2018t as explained above, the gain constant has a ?500 ppm/ c that is due to its reciprocal dependence on absolute temperature. this will cause the gain to vary by 7 db over the temperature range from ?0 c to +85 c when the nominal gain at room temperature is set to 20 db. of course, the gain change is quite small if the temperature range of operation is restricted. never- theless, the tc of the gain constant is easily compensated by buffering the control voltage to the vca with a circuit having a 3500 ppm/ c temperature coefficient. figure 4 shows a simple solution to the problem using an op amp with a pt146 tem- perature compensating resistor from the precision resistor company. note that this circuit is inverting, which will change the gain constant to a positive quantity. any other circuit that provides the necessary positive tc will work. digital control of the gain a common method of controlling the gain of a vca is to use a digital-to-analog converter to set the control voltage. figure 5 shows a 12-bit dac, the dac8512, contr olling the ssm2018t. the dac8512 is a complete 12-bit converter in an 8-pin pack- age. it includes an on-board reference and an output amplifier to produce an output voltage from 0 v to 4.095 v, which is 1 mv/bit. since the voltage is always positive, this circuit only provides attenuation. the resistor divider on the output of the dac8512 is set to scale the output voltage so that full scale produces 80 db of attenuation. the resistor divider can be adjusted to provide other attenuation ranges. if a parallel inter- face is needed, then the dac8562 may be used or, for a dual dac, the ad8582. 0.1 f +15v 18k v in dac8512 cs clr 0.1 f 18k 50pf 47pf v out 150k +15v ?15v 0.1 f +5v c con 1 f r6 825 r7 1k 0v v c +2.24v ld sclk sdi ssm2018t nc nc nc nc nc = no connect figure 5. 12-bit dac controls the vca gain supply considerations and single supply operation the ssm2018t has a wide operating supply range. many of the graphs in this data sheet show the performance of the part from 5 v to 18 v. these graphs offer typical performance specifi- cations and are a good indication of the parts?capabilities. the minimum operating supply voltage is 4.5 v. below this voltage, the parts are inoperable. thus, to account for supply variations, the recommended minimum supply is 5 v. for simplicity the circuits in the data sheet do not show supply decoupling; however, to ensure best performance, each supply pin should be decoupled with a 0.1 m f ceramic (or other low resistance and inductance type) capacitor as close to the package as possible. this minimizes the chance of supply noise feeding through the part causing excessive noise in the audio frequency range. the ssm2018t can be operated in single supply mode as long as the circuit is properly biased. figure 6 shows the proper con- figuration, which includes an amplifier to create a false ground node midway between the supplies. a high quality, wide band- width audio amplifier, such as the op176 or ad797, should be used to ensure a very low impedance ground over the full audio frequency range. the minimum operating supply for the ssm2018t is 5 v, which gives a minimum single supply of +10 v and ground. the performance of the circuit with +10 v is identical to graphs that show operation of the ssm2018t with 5 v supplies. operational voltage controlled element the ssm2018t has considerable flexibility beyond the basic vca circuit utilized throughout this data sheet. the name ?perational voltage controlled element?comes from the fact that the part behaves much like an operational amplifier with a second voltage controlled output. the symbol for the ovce connected as a unity gain follower/vca is shown in figure 7. the voltage output labeled v 1? is fed back to the inverting input just as it is for an op amp? feedback. the v g output is amplified or attenuated depending upon the control voltage. v+ 1 f r b 18k v+ 18k v in+ 1 f 18k v in? 47pf 1 f 50pf 1k v control 3k v out ssm2018t v+ op176 100k 100k v+ 10 f figure 6. single supply operation of ssm2018t because the ovce works just like an op amp, the feedback could as easily have included resistors to add gain, or a filter network to add frequency shaping. the full circuit for the ovce is shown in figure 8. notice that the amplifier whose output (pin 16) was originally connected to v minus is now the output for feedback. as mentioned before, because the ssm2018t is trimmed for the basic vca configuration, potentiometers are needed for the ovce configuration to ensure the best thd and control feedthrough performance.
rev. b ?2 ssm2018t if a symmetry trim is to be performed, it should precede the control feedthrough trim and be done as follows: 1. apply a 1 khz sine wave of 10 dbu to the input with the control voltage set for unity gain. 2. adjust the symmetry trim potentiometer to minimize distor- tion of the output signal. next the control feedthrough trim is done as follows: 1. ground the input signal port and apply a 60 hz sine wave to the control port. the sine wave should have its high and low peaks correspond to the highest gain to be used in the application and 30 db of attenuation, respectively. for example, a range of 20 db gain to 30 db attenuation requires that the sine wave amplitude ranges between ?60 mv and +840 mv on pin 11. 2. adjust the control f eedthrough potentiometer to null the signal seen at the output. v in v c v g v 1? g figure 7. ovce follower/vca connection 18k 50pf 470k 500k v+ 100k 10m control feedthrough trim v+ v? v 1?g v g inputs 220pf nc v? 1 f 1k 3k v control r b : 30k for class a 150k for class ab nc = no connect symmetry trim v+ r b 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ssm2018t 18k 50pf figure 8. ovce application circuit voltage controlled panner an interesting circuit that is built with the ovce building block is a voltage controlled panner. figure 9 shows the feed- back connection for the circuit. notice that the average of both outputs is fed back to the input. thus, the average must be equal to the input voltage. when the control voltage is set for gain at v g , this causes v 1? to attenuate (to keep the average the same). on the other hand, when v g is attenuated, v 1g is ampli- fied. the result is that the control voltage causes the input to ?an?from one output to the other. the following expressions show how this circuit works mathematically: v g = 2 k v in and v i g = 2(1 k ) v in (4) where k varies between 0 and 1 as the control voltage is changed from full attenuation to full gain, respectively. when v c = 0, then k = 0.5 and v g = v 1? = v in . again, trimming is required for best performance. pin 9 must be grounded. this is possible because the feedback is constant and the adaptive network is not needed. the vcp is the only application shown in this data sheet where pin 9 is grounded. v in v c v g v 1? g 18k 18k figure 9. basic vcp connection
rev. b e13e ssm2018t outline dimensions dimensions shown in inches and (mm). 16-lead plastic dip (n-16) package pin 1 0.280 (7.11) 0.240 (6.10) 9 16 1 8 0.210 (5.33) max 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc seating plane 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) min 0.070 (1.77) 0.045 (1.15) 0.840 (21.33) 0.745 (18.93) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 16-lead soic (r-16) package 0.4133 (10.50) 0.3977 (10.00) pin 1 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) 1 16 9 8 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.1043 (2.65) 0.0926 (2.35) 0.0118 (0.30) 0.0040 (0.10) 0.0500 (1.27) 0.0157 (0.40) 8 0 0.0291 (0.74) 0.0098 (0.25) x 45 r 0.0125 (0.32) 0.0091 (0.23) revision history location page 7/02?data sheet changed from rev. a to rev. b. deleted references to ssm2118t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . global edits to features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 edits to general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 deleted ssm2118t functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 deleted 16-lewad plastic dip and sol from pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 edits to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 deleted ssm2118t typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 deleted tpcs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7e8 edits to applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 deleted section basic vca configuration for the ssm21218t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
e14e
e15e
e16e printed in u.s.a. c00345e0e7/02(b)

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